IBM PC Convertible interface layout
Internal modem connector
Author: Peter Wendt
Email: Peterwendt@aol.com
Date: 1998-10-17
System Board Interface
The internal modem feature is attached to the system unit
through a connector on the system board. Figure 3-6 on page
3-30 shows the connector pins. The plus (+) or minus (-)
preceeding the signal name indicates the active state of the
signals. The input/output column indicates whether the signal
direction is to or from the system unit.
[Drawing on page 3-30: Modem connector viewed from looking at the rear above
onto the connector]
Pin 16 ...... Pin 30
Pin 01 ...... Pin 15
+---------+--------------------------+-------+
| I/O Pin | Signal Name | I / O |
+---------+--------------------------+-------+
| | | |
| 01 | + Adress/Data Bit 0 | I/O |
| 02 | + Adress/Data Bit 1 | I/O |
| 03 | + Adress/Data Bit 2 | I/O |
| 04 | + Adress/Data Bit 3 | I/O |
| 05 | + Adress/Data Bit 4 | I/O |
| 06 | + Adress/Data Bit 5 | I/O |
| 07 | + Adress/Data Bit 6 | I/O |
| 08 | + Adress/Data Bit 7 | I/O |
| 09 | + Adress Bit 8 | I |
| 10 | + Adress Bit 9 | I |
| 11 | + Interupt Request 4 | O |
| 12 | - I/O Read | I |
| 13 | + Reset | I |
| 14 | - Data Enable | I |
| 15 | Ground | GND |
| 16 | + Adress Latch Enable | I |
| 17 | Ground | GND |
| 18 | + Adress Enable | I |
| 19 | Ground | GND |
| 20 | + 12 VDC | PWR |
| 21 | Ground | GND |
| 22 | Ground | GND |
| 23 | Ground | GND |
| 24 | Ground | GND |
| 25 | - 13 VDC | PWR |
| 26 | Ground | GND |
| 27 | - I/O Write | I |
| 28 | + 5 VDC | PWR |
| 29 | Ground | GND |
| 30 | + High Z | I |
| | | |
+---------+--------------------------+-------+
Figure 3-6. System Board Modem Connector
All of the preceding interface lines (with the exception of the
'high Z') are common to the I/O channel and are described in
"I/O Channels" on page 2-36. The description on the 'high Z'
line follows.
High Z
The 'high Z' line is generated by the system unit. This line
indicates that all high-order adress lines (10 - 15) are at low
level. The internal modem uses this line to form an I/O select.
----
So far from the technical reference.
The only register of interest that might be different than those common
registers used on other modems (3F8h through 3FFh) is the system register
07Ch. It is a R/W register and defined as followed:
bit 7 - 2 : must be preserved (masked)
bit 1 : modem power control
0 = modem power off
1 = modem power on
bit 0 : must be preserved (masked)
Memory board connector
Author: jimbuf
Email: jimbuf@vms.ucc.okstate.edu
Date: 1995/12/20
I have an IBM PC Convertible (which I now use mainly for spare parts).
You didn't say, but the pins should be numbered on the modules. Just in
case yours aren't, if you place the module with the side the connectors
are on up (and the soldered side down) and with the male
connector at the top and the female connector at the bottom, then
for the bottom connector, pin A01 (IBM didn't start from 00) is the rightmost
pin of the top row of the 2 rows of that connector's pins. Pin B20 is,
consequently, the leftmost pin in the bottom row. For the top, male
connector, pin A01 is still the rightmost pin, but now in the bottom row
and Pin B20 is the leftmost pin in the top row.
Now, from the IBM PC Convertible Technical Reference Volume 1, dated
Jan. 17, 1987:(a "+" indicates active high and "-" active low)
+-----+-------------------------+-----+-----------------------+
| Pin | Signal Name | Pin | Signal Name |
+-----+-------------------------+-----+-----------------------+
| A01 | +address/data bit 0 | B01 | +address bit 10 |
| A02 | +address/data bit 1 | B02 | ground |
| A03 | +address/data bit 2 | B03 | +address bit 11 |
| A04 | +5 volt DC | B04 | ground |
| A05 | +address/data bit 3 | B05 | +address bit 12 |
| A06 | +address/data bit 4 | B06 | ground |
| A07 | +address/data bit 5 | B07 | +address bit 13 |
| A08 | +5 volt DC | B08 | ground |
| A09 | +address/data bit 6 | B09 | +address bit 14 |
| A10 | +address/data bit 7 | B10 | ground |
| A11 | +address bit 8 | B11 | +address bit 15 |
| A12 | +5 volt DC | B12 | ground |
| A13 | +address bit 9 | B13 | +address bit 16 |
| A14 | +address latch enable | B14 | ground |
| A15 | reserved | B15 | -memory Write |
| A16 | +5 volt DC | B16 | -data enable |
| A17 | -memory card select 0 | B17 | -memory card select 1 |
| A18 | -memory card select 2 | B18 | ground |
| A19 | -memory card select 3 | B19 | +RAM enable |
| A20 | -memory card select 4 | B20 | ground |
+-----+-------------------------+-----+-----------------------+
The memory card select lines select the cards to be accessed. "These
lines are shifted at the output of the RAM cards." (An exact quote)
Data Enable: "This line indicates when data should be gated onto the
multiplexed address/data bus."
RAM Enable: "This line enables the RAM card to be accessed. When
this line is low, all other signals to the card are ignored."
I assume you know what the ALE and Memory Write lines do.